28.7 Register Summary - EUSART


Offset	Name	Bit Pos.	7	6	5	4	3	2	1	0
0x00 ... 0x0F98	Reserved
0x0F99	RC1REG	7:0	RCREG[7:0]
0x0F9A	TX1REG	7:0	TXREG[7:0]
0x0F9B	SP1BRG	7:0	SPBRG[7:0]
0x0F9B	SP1BRG	15:8	SPBRG[15:8]
0x0F9D	RC1STA	7:0	SPEN	RX9	SREN	CREN	ADDEN	FERR	OERR	RX9D
0x0F9E	TX1STA	7:0	CSRC	TX9	TXEN	SYNC	SENDB	BRGH	TRMT	TX9D
0x0F9F	BAUD1CON	7:0	ABDOVF	RCIDL		SCKP	BRG16		WUE	ABDEN

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