3 Description

The AT93C56B/AT93C66B provides 2,048/4,096 bits of Serial Electrically Erasable and Programmable Read-Only Memory (EEPROM) organized as 128/256 words of 16 bits each (when the ORG pin is connected to V_CC) and 256/512 words of 8 bits each (when the ORG pin is tied to ground). The device is optimized for use in many industrial and commercial applications where low‑power and low‑voltage operations are essential. The AT93C56B/AT93C66B is available in space-saving 8-lead SOIC, 8-lead TSSOP, 8-pad UDFN and 8-ball VFBGA packages. All packages operate from 1.7V to 5.5V.

The AT93C56B/AT93C66B is enabled through the Chip Select (CS) pin and accessed via a three-wire serial interface consisting of Data Input (DI), Data Output (DO), and Serial Data Clock (SK). Upon receiving a READ instruction at DI, the address is decoded, and the data are clocked out serially on the DO pin. The write cycle is completely self-timed, and no separate erase cycle is required before write. The write cycle is only enabled when the part is in the Erase/Write Enable state. When CS is brought high following the initiation of a write cycle, the DO pin outputs the Ready/Busy status of the part.