25.8.2 NCOxCLK
Note: 
            
      - PWS applies only when operating in Pulse Frequency mode.
| Name: | NCOxCLK | 
| Offset: | 0x0593 | 
NCO Input Clock Control Register
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| PWS[2:0] | CKS[3:0] | ||||||||
| Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | ||
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | ||
Bits 7:5 – PWS[2:0] NCO Output Pulse-Width Select(1)
| Value | Description | 
|---|---|
| 111 | NCO output is active for 128 input clock periods | 
| 110 | NCO output is active for 64 input clock periods | 
| 101 | NCO output is active for 32 input clock periods | 
| 100 | NCO output is active for 16 input clock periods | 
| 011 | NCO output is active for 8 input clock periods | 
| 010 | NCO output is active for 4 input clock periods | 
| 001 | NCO output is active for 2 input clock periods | 
| 000 | NCO output is active for 1 input clock periods | 
Bits 3:0 – CKS[3:0] NCO Clock Source Select
| CKS | Clock Source | Active in Sleep | ||
|---|---|---|---|---|
| Value | NCO1 | |||
| 1111 | Reserved | - | ||
| 1110 | CLC4_OUT | No | ||
| 1101 | CLC3_OUT | No | ||
| 1100 | CLC2_OUT | No | ||
| 1011 | CLC1_OUT | No | ||
| 1010 | Reserved | - | ||
| 1001 | TMR4_Postscaled_OUT | No | ||
| 1000 | TMR2_Postscaled_OUT | No | ||
| 0111 | CLKR_OUT | No | ||
| 0110 | EXTOSC | Yes | ||
| 0101 | SOSC | Yes | ||
| 0100 | MFINTOSC (32 kHz) | Yes | ||
| 0011 | MFINTOSC (500 kHz) | Yes | ||
| 0010 | LFINTOSC | Yes | ||
| 0001 | HFINTOSC | Yes | ||
| 0000 | FOSC | No | ||
