31.8.8 Debug control

Name: DBGCTRL
Offset: 0x1E
Reset: 0x00
Property: PAC Write-Protection

Bit 76543210 
      FDDBD DBGRUN 
Access R/WR/W 
Reset 00 

Bit 2 – FDDBD Fault Detection on Debug Break Detection

This bit is not affected by software Reset and should not be changed by software while the TCC is enabled.

By default this bit is zero, and the on-chip debug (OCD) fault protection is disabled.

ValueDescription
0 No faults are generated when TCC is halted in Debug mode.
1 A non recoverable fault is generated and FAULTD flag is set when TCC is halted in Debug mode.

Bit 0 – DBGRUN Debug Running State

This bit is not affected by software Reset and should not be changed by software while the TCC is enabled.

ValueDescription
0 The TCC is halted when the device is halted in Debug mode.
1 The TCC continues normal operation when the device is halted in Debug mode.