19.8.8 Interrupt Enable Clear - MODE0

Name: INTENCLR
Offset: 0x06
Reset: 0x00
Property: Write-Protected

Bit 76543210 
 OVFSYNCRDY     CMP0 
Access R/WR/WR/W 
Reset 000 

Bit 7 – OVF Overflow Interrupt Enable

Writing a zero to this bit has no effect.

Writing a one to this bit will clear the Overflow Interrupt Enable bit and disable the corresponding interrupt.

ValueDescription
0 The Overflow interrupt is disabled.
1 The Overflow interrupt is enabled, and an interrupt request will be generated when the Overflow interrupt flag is set.

Bit 6 – SYNCRDY Synchronization Ready Interrupt Enable

Writing a zero to this bit has no effect.

Writing a one to this bit will clear the Synchronization Ready Interrupt Enable bit and disable the corresponding interrupt.

ValueDescription
0 The Synchronization Ready interrupt is disabled.
1 The Synchronization Ready interrupt is enabled, and an interrupt request will be generated when the Synchronization Ready interrupt flag is set.

Bit 0 – CMP0 Compare 0 Interrupt Enable

Writing a zero to this bit has no effect.

Writing a one to this bit will clear the Compare 0 Interrupt Enable bit and disable the corresponding interrupt.

ValueDescription
0 The Compare 0 interrupt is disabled.
1 The Compare 0 interrupt is enabled, and an interrupt request will be generated when the Compare x interrupt flag is set.