43.4.2 Internal Oscillator Parameters

Table 43-8. 
Standard Operating Conditions (unless otherwise stated)(1)
Param No.Sym.CharacteristicMin.Typ. †Max.UnitsConditions
OS50FHFOSCPrecision Calibrated HFINTOSC Frequency(2)

4

8

12

16

32

MHz
OS51*FHFOSCLPLow-Power Optimized HFINTOSC Frequency

1

2

MHz

MHz

OS52*FMFOSCInternal Calibrated MFINTOSC Frequency500kHz
OS53*FLFOSCInternal LFINTOSC Frequency31kHz
OS54*THFOSCSTHFINTOSC Wake-up from Sleep Start-up Time20μsSystem Clock at 4 MHz
OS56*TLFOSCSTLFINTOSC Wake-up from Sleep Start-up Time332μs
OS57*%CALOSCTUNE Step Size0.25%

† Data in “Typ” column is at 3.0V, 25°C unless otherwise stated.

* These parameters are characterized but not tested.

Note:
  1. To ensure these oscillator frequency tolerances, VDD and VSS must be capacitively decoupled as close to the device as possible. 0.1 μF and 0.01 μF values in parallel are recommended.
  2. See the figure below.
Figure 43-5. Precision Calibrated HFINTOSC Frequency Accuracy Over Device VDD and Temperature