3.3.2 Quad SPI NOR Flash Memory

The board features one Quad Serial Peripheral Interface (QSPI) memory SST26VF064BEUI-104I/MF running up to 104 MHz.

The QSPI is a synchronous serial data link that provides communication with external devices in Host mode.

Using the QSPI, the system can execute code directly from a serial Flash memory (XIP) without code shadowing to RAM. The serial Flash memory mapping is seen in the system as other memories such as ROM, SRAM, DRAM, embedded Flash memory, etc.

With the support of the Quad SPI protocol, the system can use high-performance serial Flash memories which are small and inexpensive compared to parallel Flash memories.

The QSPI memory device embeds one EUI-48 address which can be used to assign a MAC address to one of the GMAC interfaces.

Figure 3-23. Quad SPI Serial Flash Memory Schematic

Keep the JP10 jumper placed on the J39 header to be able to boot from (or use) the QSPI Flash memory.

Remove the JP10 jumper to prevent the system from booting from the QSPI Flash memory.

Table 3-9. QSPI Flash Memory Signal Description
PIO	Signal Name	Signal Description
PB8	QSPI0_IO3	QSPI0 data line 3
PB9	QSPI0_IO2	QSPI0 data line 2
PB10	QSPI0_IO1	QSPI0 data line 1
PB11	QSPI0_IO0	QSPI0 data line 0
PB12	QSPI0_CS	QSPI0 Chip Select signal
PB13	QSPI0_SCK	QSPI0 Clock signal