9.1.1 Registers Properties

Registers can be 8, 16, or 32 bits wide. Atomic 8-bit, 16-bit and 32-bit accesses are supported. In addition, the 8-bit quarters and 16-bit halves of a 32-bit register, and the 8-bit halves of a 16-bit register can be accessed directly.

PAC Write-Protection Register Property:

Some registers are optionally write-protected by the Peripheral Access Controller (PAC). The PAC write protection is denoted by the "PAC Write-Protection" property in each individual register description. For more details, refer to the PAC - Peripheral Access Controller.

Read-Synchronized, Write-Synchronized Register Property:

Some registers (or bit fields within a register) require synchronization when read and/or written. Synchronization is denoted by the "Read-Synchronized” (bits) and "Write-Synchronized” (bits) property in each individual register description. For more details, refer to Register Synchronization.

Enable-Protected Register Property:

Some registers (or bit fields within a register) can only be written when the peripheral is disabled. Such protection is denoted by the "Enable-Protected” (bits) property in each individual register description.

Mix-Secure Peripherals Register Property:

A Mix-Secure Peripheral has different types of registers (Non-Secure, Secure, Write-Secure, Mix-Secure, and Write-Mix-Secure) with different access permissions for each bit field.

In the following register descriptions, the access permissions are specified.

For additional information, refer to 14 Implementation Defined Attribution Unit (IDAU).

Bitfield Access Properties:

The access properties of bit fields within a register are defined as follows:

Table 9-1. Register Bit Attribute Legend
Symbol Description Symbol Description Symbol Description
R Readable bit HC Cleared by Hardware (Grey cell) Unimplemented
W Writable bit HS Set by Hardware X Bit is unknown at Reset
K Write to clear S Software settable bit