13.8.7 Cache Maintenance 1
| Symbol | Description | Symbol | Description | Symbol | Description |
|---|---|---|---|---|---|
| R | Readable bit | HC | Cleared by Hardware | (Grey cell) | Unimplemented |
| W | Writable bit | HS | Set by Hardware | X | Bit is unknown at Reset |
| K | Write to clear | S | Software settable bit | — | — |
| Name: | MAINT1 |
| Offset: | 0x24 |
| Reset: | 0x00000000 |
| Property: | Write-only |
| Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | |
| WAY[3:0] | |||||||||
| Access | W | W | W | W | |||||
| Reset | 0 | 0 | 0 | 0 | |||||
| Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
| Access | |||||||||
| Reset |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| INDEX[7:4] | |||||||||
| Access | W | W | W | W | |||||
| Reset | 0 | 0 | 0 | 0 | |||||
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| INDEX[3:0] | |||||||||
| Access | W | W | W | W | |||||
| Reset | 0 | 0 | 0 | 0 | |||||
Bits 31:28 – WAY[3:0] Invalidate Way
| Value | Name | Description |
|---|---|---|
| 0x0 | Reserved | |
| 0x1 | WAY0 | Way 0 is selection for index invalidation |
| 0x2 | WAY1 | Way 1 is selection for index invalidation |
| 0x3 | Reserved | |
| 0x4 | WAY2 | Way 2 is selection for index invalidation |
| 0x5-0x7 | Reserved | |
| 0x8 | WAY3 | Way 3 is selection for index invalidation |
| 0x9-0xF | Reserved |