11.2 Physical Memory Map

The high-speed bus is implemented as a bus matrix. All high-speed bus addresses are fixed and are never remapped in any way, even during boot. The 32-bit physical address space is mapped as follows:

Table 11-1. Physical Memory Map
Memory	Start Address	Size in KB (unless otherwise stated)
Memory	Start Address	PIC32CK2051xx	PIC32CK1025xx	PIC32CK1012xx
Tightly Coupled Memory (TCM)	0x0000_0000	4	4	4
Boot Flash Memory	0x0800_0000	128	128	128
Configuration Flash Memory	0x0A00_0000	64	64	64
Program Flash Memory	0x0C00_0000	2048	1024	1024
Embedded SRAM	0x2000_0000	512	256	128
Peripheral Bridge A	0x4400_0000	256	256	256
Peripheral Bridge B	0x4480_0000	256	256	256
Peripheral Bridge C	0x4500_0000	256	256	256
Independent Peripherals	0x4600_0000	9	9	1