39.3 USB Block Diagram

The USB 2.0 Transceiver Macrocell Interface (UTMI) requires an external 12 MHz clock as a reference to its internal 480 MHz phase locked loop (PLL). The PLL is used to clock an internal digital locked loop (DLL) module to retrieve USB differential data at 480 Mbit/s.

Figure 39-1. LS/FS Implementation: USB Block Diagram