38.8.5 Interrupt Flag Status and Clear
Name: | INTFLAG |
Offset: | 0x07 |
Reset: | 0x00 |
Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
GFMCMP | ENCCMP | ||||||||
Access | R/W | R/W | |||||||
Reset | 0 | 0 |
Bit 1 – GFMCMP GF Multiplication Complete
This flag is cleared by writing a '1' to it.
This flag is set when GHASH value is available on the Galois Hash Registers
(GHASHx
) in GCM mode.
Writing a '0' to this bit has no effect.
This flag is also automatically cleared in the following cases.
- Manual encryption/decryption occurs (
START
inCTRLB
register). - Reading from the
GHASHx
register.
Bit 0 – ENCCMP Encryption Complete
This flag is cleared by writing a '1' to it.
This flag is set when encryption/decryption is complete and valid data is available on the Data Register.
Writing a '0' to this bit has no effect.
This flag is also automatically cleared in the following cases:
- Manual encryption/decryption occurs (
START
inCTRLA
register). (This feature is needed only if we do not support double buffering ofDATA
registers). - Reading from the data register (
DATAx
) when LOD = 0. - Writing into the data register (
DATAx
) when LOD = 1. - Reading from the Hash Key register (
HASHKEYx
).