9.5 Performance Level Overview

By default, the device will start in Performance Level 0. This PL0 is aiming for the lowest power consumption by limiting logic speeds and the CPU frequency. As a consequence, all GCLK will have limited capabilities, and some peripherals and clock sources will not work or with limited capabilities:

List of peripherals/clock sources not available in PL0:
  • USB (limited by logic frequency)
  • DFLL48M
List of peripherals/clock sources with limited capabilities in PL0:
  • All AHB/APB peripherals are limited by CPU frequency
  • DPLL96M: may be able to generate 48MHz internally, but the output cannot be used by logic
  • GCLK: the maximum frequency is by factor 4 compared to PL2
  • SW interface: the maximum frequency is by factor 4 compared to PL2
  • TC: the maximum frequency is by factor 4 compared to PL2
  • TCC:the maximum frequency is by factor 4 compared to PL2
  • SERCOM: the maximum frequency is by factor 4 compared to PL2
List of peripherals/clock sources with full capabilities in PL0:
  • AC
  • ADC
  • DAC
  • EIC
  • OPAMP
  • OSC16M
  • PTC
  • All 32KHz clock sources and peripherals
Full functionality and capability will be ensured in PL2. When transitioning between performance levels, the Supply Controller (SUPC) will provide a configurable smooth voltage scaling transition.

References:

PM – Power Manager

SUPC – Supply Controller

Block Diagram