24.4.1 Reset Controller Overview

The Reset Controller (RSTC) is made up of an NRST manager, a start-up counter and a reset state manager. It runs at 32 kHz and generates the following reset signals:

• Processor reset–Resets the processor and the entire set of embedded peripherals.
• Backup reset–Resets all peripherals powered by VDDBU.

These reset signals are asserted by the RSTC, either on external events or on software action. The reset state manager controls the generation of reset signals.

The start-up counter waits for the complete crystal oscillator start-up. For the wait delay, refer to the crystal oscillator start-up time maximum value in the section “Crystal Oscillator Characteristics” in “Electrical Characteristics”.

The Mode register (RSTC_MR), used to configure the reset controller, is powered with VDDBU, so that its configuration is saved as long as VDDBU is on.