47.7.1.2 Fractional Baud Rate in Asynchronous Mode
The baud rate generator previously defined is subject to the following limitation: the output frequency changes by only integer multiples of the reference frequency. An approach to this problem is to integrate a fractional N clock generator that has a high resolution. The generator architecture is modified to obtain baud rate changes by a fraction of the reference source clock. This fractional part is programmed with the FP field in FLEX_US_BRGR. If FP is not 0, the fractional part is activated. The resolution is one eighth of the clock divider. The fractional baud rate is calculated using the following formula:
The modified architecture is presented in the following figure.
Warning: When the value of field FP is greater than 0, the SCK
(oversampling clock) generates nonconstant duty cycles. The SCK high duration is increased
by “selected clock” period from time to time. The duty cycle depends on the value of the CD
field.