44.8.6 I2SC Interrupt Enable Register

The following configuration values are valid for all listed bit names of this register:

0: No effect.

1: Sets the corresponding bit in I2SC_IMR

Name: I2SC_IER
Offset: 0x14
Property: Write-only

Bit 3130292827262524 
          
Access  
Reset  
Bit 2322212019181716 
          
Access  
Reset  
Bit 15141312111098 
          
Access  
Reset  
Bit 76543210 
  TXURTXRDY  RXORRXRDY  
Access WWWW 
Reset –––– 

Bit 6 – TXUR Transmit Underflow Interrupt Enable

Bit 5 – TXRDY Transmit Ready Interrupt Enable

Bit 2 – RXOR Receiver Overrun Interrupt Enable

Bit 1 – RXRDY Receiver Ready Interrupt Enable