53.5.2 Timestamp Generation

• 16-bit Timestamp Generation

For timestamp generation, the MCAN supplies a 16-bit wrap-around counter. A prescaler TSCC.TCP can be configured to clock the counter in multiples of CAN bit times (1…16). The counter is readable via MCAN_TSCV.TSC. A write access to the Timestamp Counter Value register (MCAN_TSCV) resets the counter to zero. When the timestamp counter wraps around, the interrupt flag MCAN_IR.TSW is set.

On start of frame reception / transmission, the counter value is captured and stored into the timestamp section of an Rx Buffer / Rx FIFO (RXTS[15:0]) or Tx Event FIFO (TXTS[15:0]) element.

• 32-bit Timestamp Generation Using TSU

A Time Stamping Unit (TSU) for generation of 32-bit timestamps according to CiA 603 is connected to the MCAN TSU interface. External timestamping is enabled when MCAN_CCCR.UTSU = ‘1’. To filter for Sync messages a Standard or Extended Filter Element has to be configured with the Sync message ID and bit SSYNC resp. ESYNC set to one. At the end of frame reception / transmission (EOF), the timestamp is captured by the TSU. The number of the TSU Timestamp register which holds the captured timestamp is stored into the related Rx Buffer/Rx FIFO element (R1B.RXTSP[2:0]) resp. Tx Event FIFO element (E1B.TXTSP[2:0]).

In case CCCR.UTSU = ‘0’ (default value), the MCAN 16-bit timestamp counter is used, if enabled.

The timestamp values are stored in the MCAN_TSU_TS registers available in the TSU.

Only the TSU internal timebase is available. Set MCAN_TSU_TSCFG.TBCS to '0'.