18.8.12 Interrupt Enable Set - MODE1

Name: INTENSET
Offset: 0x07
Reset: 0x00
Property: Write-Protected

Bit 76543210 
 OVFSYNCRDY    CMPx CMPx  
Access R/WR/WR/WR/W 
Reset 0000 

Bit 7 – OVF Overflow Interrupt Enable

Writing a zero to this bit has no effect.

Writing a one to this bit will set the Overflow interrupt bit and enable the Overflow interrupt.

ValueDescription
0 The overflow interrupt is disabled.
1 The overflow interrupt is enabled.

Bit 6 – SYNCRDY Synchronization Ready Interrupt Enable

Writing a zero to this bit has no effect.

Writing a one to this bit will set the Synchronization Ready Interrupt Enable bit and enable the Synchronization Ready interrupt.

ValueDescription
0 The synchronization ready interrupt is disabled.
1 The synchronization ready interrupt is enabled.

Bits 1,0 – CMPx  Compare x Interrupt Enable [x=1:0]

Writing a zero to this bit has no effect.

Writing a one to this bit will set the Compare x Interrupt Enable bit and enable the Compare x interrupt.

ValueDescription
0 The compare x interrupt is disabled.
1 The compare x interrupt is enabled.