2 System Overview

The following block diagram illustrates an overview of the main functional blocks of the ATA5835.

The internal RF switch enables various functions, such as RX/TX switching, antenna diversity or channel prefiltering with a minimized external component count.

The receiver is based on a low-IF architecture with FSK or ASK (OOK) demodulation and NRZ or Manchester decoding. Two digital receive paths, pattern-based wake-up detection and flexible telegram handling settings allow an application-specific adaptation of the receiver behavior. The user can either store the received telegram payload in the internal buffer or directly stream out on a transparent interface to a host microcontroller. In the RXMode (Buffered), the system provides automatic CRC-based verification of the received telegram.

The transmitter is compatible with the receiver concerning RF range, modulation and data coding to allow a transceiver link using two ATA5835 devices.

The transmitter has two modes: the Transparent and the Buffered mode.

• In the Transparent mode, the data are sent out as provided on the input pin.
• In the Buffered mode, the system provides an automatic telegram composition with cyclic preamble extension, stop sequence creation and CRC calculation.

The system contains various clock sources:

• A fractional-N PLL, which is based on a 23.8-MHz to 26.2-MHz crystal oscillator (XTO, default 24.305 MHz), clocks all RF activity.
• The AVR system runs on XTO/4 when the RF part is active or on a 6.36-MHz FRC oscillator when the front end is shut down for reduced power consumption.
• In deep Sleep modes, for example, Polling sleep phases, a low-power 125-kHz oscillator clocks the system.

The user can power-on the system using a single supply voltage (VS) between 2.0V and 5.5V, which leads to two different application scenarios:

• A 5V application – For this application, an embedded power management module generates all internal voltages. An integrated DC-DC converter allows additional significant reduction of current consumption on VS in the Receive and the Transmit modes.
• A 3V application – This application targets battery-powered applications with decreasing VS over its lifetime. In this mode, VS can directly power the power amplifier to avoid the voltage drop of the internal regulator and optimize the transmit output power.

All PWRON and NPWRON pins (PC1 to PC5, PB4, PB7) are active in the OFFMode. This means that even if the ATA5835 is in the OFFMode and the DVCC voltage is switched off, the internal power management circuitry biases these pins with VS to allow a wake-up of the system.

The EEPROM stores the configuration of the ATA5835 while the firmware located in the ROM defines the functionality and the AVR processes the firmware. The internal storage of configuration data has an advantage as it minimizes the external controller initialization tasks for decreased start-up time, response time and host controller burden. The SPI interface performs the external control of the system. An SPI command can trigger the AVR to configure the hardware according to settings that are stored in the EEPROM and start up a given system mode (example: RXMode, TXMode or PollingMode). Internal events such as “Start of Telegram” or “FIFO empty” are signaled to the external microcontroller on pin 28 (PB6/EVENT). Generally, the implemented firmware functions with the configuration range in the EEPROM are sufficient to design an advanced host-controlled radio link. However, the ATA5835 also provides 20-KByte of user Flash memory and an API to add highly-customized functions or run the system without a host controller.

The user can use the configurable digital I/O pins as button inputs, external LNA switch (RX_ACTIVE), LED drivers, EVENT pin, switching control for additional RF switches, general purpose digital inputs or wake-up inputs, clock output for an external host and so on.