21.10.5 TxCLKCON

Timer Clock Source Selection Register

Name:	TxCLKCON
Offset:	0x0310,0x0316,0x031C


Bit	7	6	5	4	3	2	1	0
					CS[3:0]
Access					R/W	R/W	R/W	R/W
Reset					0	0	0	0

Bits 3:0 – CS[3:0] Timer Clock Source Selection

Table 21-3. Clock Source Selection
CS	Clock Source
CS	Timer2	Timer4	Timer6
`1111`	Reserved
`1110`	CLC4_OUT
`1101`	CLC3_OUT
`1100`	CLC2_OUT
`1011`	CLC1_OUT
`1010`	ZCD_OUT
`1001`	NCO1_OUT
`1000`	EXTOSC
`0111`	SOSC
`0110`	MFINTOSC (32 kHz)
`0101`	MFINTOSC (500 kHz)
`0100`	LFINTOSC
`0011`	HFINTOSC
`0010`	F_OSC
`0001`	F_OSC/4
`0000`	Pin selected by T2INPPS	Pin selected by T4INPPS	Pin selected by T6INPPS

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