41.3.3 Power-Down Current (I_PD)^(1,2,3)

Table 41-3.
Standard Operating Conditions (unless otherwise stated)
Param. No.	Sym.	Device Characteristics	Min.	Typ.†	Max. +85°C	Max. +125°C	Units	Conditions
Param. No.	Sym.	Device Characteristics	Min.	Typ.†	Max. +85°C	Max. +125°C	Units	V_DD	Note
D200	I_PD	I_PD Base	—	0.4	4	12	μA	3.0V
D201	I_{PD_WDT}	Low-Frequency Internal Oscillator/WDT	—	0.5	5	13	μA	3.0V
D202	I_{PD_SOSC}	Secondary Oscillator (S_OSC)	—	—	8.5	20	μA	3.0V
D204	I_{PD_FVR_BUF1}	FVR Buffer 1 (ADC)	—	40	60	76	μA	3.0V
D204A	I_{PD_FVR_BUF2}	FVR Buffer 2 (DAC/CMP)	—	40	60	76	μA	3.0V
D205	I_{PD_BOR}	Brown-out Reset (BOR)	—	27	38	50	μA	3.0V
D207	I_{PD_ADCA}	ADC - Active	—	—	5	13	μA	3.0V	ADC is not converting (Note 4)
D208	I_{PD_CMP}	Comparator	—	27	45	70	μA	3.0V
* These parameters are characterized but not tested. † Data in “Typ.” column is at 3.0V, 25°C unless otherwise stated. These parameters are for design guidance only and are not tested. Note: The peripheral current is the sum of the base I_DD and the additional current consumed when this peripheral is enabled. The peripheral ∆ current can be determined by subtracting the base I_DD or I_PDcurrent from this limit. Max. values will be used when calculating total current consumption. The power-down current in Sleep mode does not depend on the oscillator type. Power-down current is measured with the part in Sleep mode with all I/O pins in High-Impedance state and tied to V_SS. All peripheral currents listed are on a per-peripheral basis if more than one instance of a peripheral is available. ADC clock source is ADCRC.

41.3.3 Power-Down Current (IPD)(1,2,3)