28.8.11 CLCnGLS3

CLCn Gate4 Logic Select Register
Name: CLCnGLS3
Offset: 0x0595

Bit 76543210 
 G4D4TG4D4NG4D3TG4D3NG4D2TG4D2NG4D1TG4D1N 
Access R/WR/WR/WR/WR/WR/WR/WR/W 
Reset xxxxxxxx 

Bits 1, 3, 5, 7 – G4DyT dyT: Gate4 Data ‘y’ True (noninverted)

Reset States: 
POR/BOR = xxxx
All Other Resets = uuuu
ValueDescription
1 dyT is gated into g4
0 dyT is not gated into g4

Bits 0, 2, 4, 6 – G4DyN dyN: Gate4 Data ‘y’ Negated (inverted)

Reset States: 
POR/BOR = xxxx
All Other Resets = uuuu
ValueDescription
1 dyN is gated into g4
0 dyN is not gated into g4