3.2.8.4.1 External Chip Reset

When the Reset push button switch is pressed, the device places all pins into their default state. An additional PIO (PB16) allows the LAN9252 to be reset by software.

The figure below illustrates the implementation of the EtherCAT interface.

Figure 3-24. EtherCAT Interface

The table below shows the signal assignment on the HBI interface between SAMA5D27 and LAN9252.

Table 3-14. EBI Signal Description
PIOMnemonicSharedSignal Description
PA22D0WILC3000Data
PA23D1–Data
PA24D2–Data
PA25D3–Data
PA26D4–Data
PA27D5–Data
PA28D6WILC3000Data
PA29D7–Data
PB3D8–Data
PB4D9–Data
PB5D10–Data
PB6D11–Data
PB7D12–Data
PB8D13–Data
PB9D14–Data
PB10A0/D15–Data
PB12A1–Address
PB13A2–Address
PB14A3–Address
PB15A4–Address
PB2RD–Read
PA30WR–Write
PC6CS–Chip select
PB11IRQ–Interrupt
PB16RESET–Reset chip

The figure below depicts the connection between LAN9252 and the two EtherCAT connectors.

Figure 3-25. EtherCAT Connectors J13 and J14

The position of the two connectors is shown in the picture below.

Figure 3-26. RJ45 Connectors J13 and J14 Location