41.3 Rev. C - 06/2021

SectionChanges
Document
  • General improvement of the documentation and its structure
  • Updated terminology used throughout the data sheet:
    • Master is replaced by host
    • Slave is replaced by client
Device
  • Memories
    • Improved BODCFG fuse description
  • Peripherals and Architecture
    • Updated the Interrupt Vector Mapping table
    • Updated the REVID.MAJOR bit field description from 0x00 = A, 0x01 = B to 0x01 = A, 0x02 = B
  • Ordering Information
    • Added note for automotive-grade ordering codes (VAO suffix)
  • Package Drawings
    • Added note in the Online Package Drawings section
    • Added the Package Marking section
    • Updated 64-Pin VQFN style from MR to R4X
    • Added 32, 48 and 64-Pin VQFN Wettable Flanks packages
Hardware Guidelines
  • Digital Power Supply
    • Updated primary decoupling capacitor value to 100 nF
    • Added optional decoupling capacitor (C3)
    • Added note
CPU
  • Updated the AVR® CPU Architecture figure
  • Improved description for the RAMPZ register
NVMCTRL
  • Updated the NVMCTRL Block Diagram figure
  • Removed offset column from the Available Interrupt Vectors and Sources table
CLKCTRL
  • Updated the Phase-Locked Loop (PLL) section. Added initialization example.
  • The Auto-Tune section renamed to Manual Tuning and Auto-Tune. Added the new Manual Tuning section.
  • CLKCTRL.PLLCTRLA added to the list of registers requiring Configuration Change Protection (in the Registers Under Configuration Change Protection table)
  • Improved description of the RUNSTBY bit in the OSCHFCTRLA, OSCHFTUNE, PLLCTRLA, OSC32KCTRLA and XOSC32KCTRLA registers
  • Improved description of the XOSC32KCTRLA bit fields
  • Updated the name of the MULFAC bit field in the PLLCTRLA register from Frequency Select to Multiplication Factor
  • Improved description of the PLLCTRLA.MULFAC bit field
SLPCTRL
  • Improved the Sleep modes section
  • Updated the Sleep Mode Activity Overview tables
  • Added the Configuration Change Protection section
  • Updated description for the VREGCTRL.HTLLEN bit field
RSTCTRL
  • Figures updated:
    • Block Diagram
    • MCU Start-up, RESET Tied to VDD
    • Brown-out Detector Reset
    • External Reset Characteristics
  • Figures added:
    • Watchdog Reset
    • Software Reset
  • Updated the Logic Domains Affected by Various Resets table
  • Updated the Reset Time section
CPUINT
  • Updated the CPUINT - Registers under Configuration Change Protection table
  • Improved the Non-Maskable Interrupts section
PORT
  • System Clock renamed to Peripheral clock
  • Added initialization code example in the Multi-Pin Configuration section
  • Added clarification notes in following sections:
    • Multi-Pin Configuration
    • Virtual Ports
    • PINCONFIG.ISC bit field description
BOD
  • The VLMCTRL register renamed to VLMCTRLA
TCA
  • Improved the Frequency (FRQ) Waveform Generation section:
    • Added description on WOn offset
    • Added the Offset When Counting Up and Inverting Waveform Output figures
    • Added the Offset Equation Overview table
    • Added the Single-Slope Pulse-Width Modulation in Split Mode figure
  • Figures updated:
    • Timer/Counter Block Diagram
    • Single-Slope Pulse-Width Modulation
    • Dual-Slope Pulse-Width Modulation
  • Added clarification notes in the following sections:
    • Single-Slope Pulse-Width Modulation
    • Dual-Slope Pulse-Width Modulation
    • Events
  • Improved the Split Mode - Two 8-Bit Timer/Counters section
  • Improved bit fields and register description:
    • Added clarification note in the CTRLC register description
    • Improved description for the LUPD bit field in the CTRLECLR and CTRLESET registers
    • Improved description for UPDOWN value of the EVACTA/B bit field in the EVCTRL register
TCB
  • General improvement of the documentation
TCD
  • Updated the FAULTCTRL register bit fields name:
    • CMPxEN renamed to CMPEN
    • CMPx renamed to CMP
RTC
  • Removed note from the RTC Functional Description - Configure RTC section
  • Removed note from the PIT Functional Description - Initialization section
USART
  • Updated terminology:
    • Master is replaced by host
    • Slave is replaced by client
SPI
  • General improvement of the documentation
  • Updated terminology:
    • Master is replaced by host
    • Slave is replaced by client
TWI
  • Improved description for the Client Initialization section
  • Improved description for register bit fields:
    • The SDASETUP bit field from the CTRLA register
    • The INPUTLVL, FMPEN and SDAHOLD bit fields from the DUALCTRL register
    • The FLUSH bit field from the MCTRLB register
    • The BUSSTATE bit field from the MSTATUS register
    • The SCMD bit field from the SCTRLB register
CCL
  • Updated the Truth Table Output Value Selection figure
  • Updated the Linked LUT Input Selection figure
  • Improved description for the TRUTHn registers
  • Updated terminology:
    • Master is replaced by host
    • Slave is replaced by client
ADC
  • Added information on warm-up time in the Sleep Mode Operation section
  • Updated the Temperature Measurement section to include INITDLY and SAMPLEN configuration in the initialization steps
DAC
  • Removed conversion rate from the Feature section
  • Updated the DAC Block Diagram figure
  • Added the Signal Description section
  • Restructured the Operation section
    • Added the DAC Output section
    • The DAC as Source For Internal Peripheral section renamed as Unbuffered Output as Source For Internal Peripherals
    • The DAC Output on Pin section renamed as Buffered Output
UPDI
  • Renamed UPDICLKDIV to UPDICLKSEL
  • Updated the UPDI Clock Domains figure
  • Improved the Clocks section
  • Improved figures in the UPDI Instruction Set section
  • Updated Reset value for the STATUSA.UPDIREV bit field
  • Renamed the ASI_KEY_STATUS.CHIPERASE bit field to ASI_KEY_STATUS.CHER
  • Renamed the ASI_CTRLA.UPDICLKDIV bit field to ASI_CTRLA.UPDICLKSEL
  • Renamed the ASI_SYS_STATUS.UPDICLKDIV bit field to ASI_SYS_STATUS.UPDICLKSEL
Electrical characteristics
  • Updated the Electrical Characteristics section
  • Added the Characteristics Graphs section