14.3.2.1 Enabling, Disabling and Resetting
The global enabling of interrupts is done by writing a ‘1
’ to
the Global Interrupt Enable (I) bit in the CPU Status (CPU.SREG) register. To disable
interrupts globally, write a ‘0
’ to the I bit in CPU.SREG.
The desired interrupt lines must also be enabled in the respective peripheral by writing to the peripheral’s Interrupt Control (peripheral.INTCTRL) register.
The interrupt flags are not automatically cleared after the interrupt is executed. The respective INTFLAGS register descriptions provide information on how to clear specific flags.