UPDI One-Wire Interface for External
Programming and On-Chip-Debugging (OCD)
Uses
a dedicated pin
of the device for programming
No GPIO pins occupied during the
operation
Asynchronous half-duplex UART
protocol towards the programmer
Programming:
Built-in error detection and error
signature generation
Override of response generation
for faster programming
Debugging:
Memory-mapped access to device
address space (NVM, RAM, I/O)
No limitation on the device clock
frequency
Unlimited number of user program
breakpoints
Two hardware breakpoints
Support for advanced OCD features
Run-time readout of the CPU
Program Counter (PC), Stack Pointer (SP) and Status Register (SREG) for code
profiling
Detection and signalization
of the Break/Stop condition in the CPU
Program flow control for
Run, Stop and Reset debug instructions
Nonintrusive run-time chip
monitoring without accessing the system registers
Interface for reading the result
of the CRC check of the Flash on a locked device
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