24.8 Interrupts

Table 24-2. Available Interrupt Vectors and Sources
Name	Vector Description	Conditions
RTC	Real-Time Counter overflow and compare match interrupt	Overflow (OVF): The counter has reached the value from the RTC.PER register and wrapped to zero Compare (CMP): Match between the value from the Counter (RTC.CNT) register and the value from the Compare (RTC.CMP) register
PIT	Periodic Interrupt Timer interrupt	A time period has passed, as configured by the PERIOD bit field in RTC.PITCTRLA

When an interrupt condition occurs, the corresponding interrupt flag is set in the peripheral’s Interrupt Flags (peripheral.INTFLAGS) register.

An interrupt source is enabled or disabled by writing to the corresponding enable bit in the peripheral’s Interrupt Control (peripheral.INTCTRL) register.

An interrupt request is generated when the corresponding interrupt source is enabled, and the interrupt flag is set. The interrupt request remains active until the interrupt flag is cleared. See the peripheral’s INTFLAGS register for details on how to clear interrupt flags.

Note that:

The RTC has two INTFLAGS registers: RTC.INTFLAGS and RTC.PITINTFLAGS.
The RTC has two INTCTRL registers: RTC.INTCTRL and RTC.PITINTCTRL.