3.2 Codec
The built-in codec has a high SNR performance and it consists of an ADC, a DAC and an additional analog circuitry. The internal codec supports 20-bit resolution for DAC and 16-bit resolution for ADC.
- Interfaces
- Two mono differential or single-ended MIC inputs
- One stereo single-ended line input
- One stereo single-ended line output
- One stereo single-ended headphone output (capacitor-less connection)
- Built-in circuit
- MIC bias
- Reference and biasing circuitry
- Optional digital High Pass Filter (HPF) on ADC path
- Silence detection
- To turn off the DSP and audio codec subsystem, if there is no Line-In data after UI configured time stamp.
- Anti-pop function (pop reduction system to reduce audible glitches)
- Sampling rates:
- ADC/DAC/I2S: 8 kHz, 16 kHz, 44.1 kHz, and 48 kHz
Note: The sampling rates can be selected in the
CODEC Setup tab of Config Tool.
DAC Performance
The audio graphs in this section are produced in the following conditions:
- At room temperature
- Using BM83 EVB platform with BM83 module mounted on BM83 Carrier Board
- Input signal = 1 kHz sine tone, level sweep across -100 dBv to 6 dBv, frequency sweep across 20 Hz to 20 kHz at 1 Fs input level
- Various termination loads (16Ω, 32Ω, 100 kΩ)
- Analog gain = -3 dB; digital gain = 0 dB
- A-weighting applied, 22K bandwidth.
The following figures illustrate the DAC performance.
ADC Performance
The audio graphs in this section were produced in the following conditions:
- At room temperature
- Using BM83 EVB platform with BM83 module mounted on BM83 Carrier Board
- Input signal = 1 kHz sine tone, level sweep across -100 dBv to 6 dBv, frequency sweep across 20 Hz to 20 kHz at 1 Fs input level
- Analog gain = -3 dB; digital gain = 0 dB
- A-weighting applied, 22K bandwidth