8.1 Timing Specifications

The following figures illustrate the timing diagram of the IS2083BM/BM83 in I2S and PCM modes.

Figure 8-1. Timing Diagram for I2S Modes (Host/Client)
Figure 8-2. Timing Diagram for PCM Modes (Host/Client)

The following figure illustrates the timing diagram of the audio interface.

Figure 8-3. Audio Interface Timing Diagram

The following table provides the timing specifications of the audio interface.

Table 8-15. Audio Interface Timing Specifications(1)
ParameterSymbolMin.Typ.Max.Unit
SCLK1 duty ratiodSCLK—50—%
SCLK1 cycle timetSCLKCY50——ns
SCLK1 pulse width hightSCLKCH20——ns
SCLK1 pulse width lowtSCLKCL20——ns
RFS1 setup time to SCLK1 rising edgetRFSSU10——ns
RFS1 hold time from SCLK1 rising edgetRFSH10——ns
DR1 hold time from SCLK1 rising edgetDH10——ns
  1. Test Conditions: Client mode, fs = 48 kHz, 24-bit data and SCLK1 period = 256 fs