27.5.10 Slave Control B
| Name: | SCTRLB |
| Offset: | 0x0A |
| Reset: | 0x00 |
| Property: | - |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| ACKACT | SCMD[1:0] | ||||||||
| Access | R/W | R/W | R/W | ||||||
| Reset | 0 | 0 | 0 | ||||||
Bit 2 – ACKACT Acknowledge Action
The ACKACT(1) bit represents the
behavior of the slave device under certain conditions defined by the bus
protocol state and the software interaction. If the Smart Mode Enable (SMEN) bit
in the Slave Control A (TWIn.SCTRLA) register is set to ‘1’,
the acknowledge action is performed when the Slave Data (TWIn.SDATA) register is
read, else a command must be written to the Command (SCMD) bit field in the
Slave Control B (TWIn.SCTRLB) register.
The acknowledge action is not performed when the Slave Data (TWIn.SDATA) register is written, since the slave is sending data.
| Value | Name | Description |
|---|---|---|
| 0 | ACK | Send ACK |
| 1 | NACK | Send NACK |
Bits 1:0 – SCMD[1:0] Command
The SCMD(1) bit field is a strobe. This bit
field is always read as ‘0’.
Writing to this bit field triggers a slave operation as defined by the table below.
| SCMD[1:0] | Group Configuration | DIR | Description |
|---|---|---|---|
0x0 |
NOACT | X | No action |
0x1 |
— | X | Reserved |
0x2 |
COMPTRANS | Used to complete a transaction | |
| W | Execute Acknowledge Action succeeded by waiting for any Start (S/Sr) condition | ||
| R | Wait for any Start (S/Sr) condition | ||
0x3 |
RESPONSE | Used in response to an address interrupt (APIF) | |
| W | Execute Acknowledge Action succeeded by reception of next byte | ||
| R | Execute Acknowledge Action succeeded by slave data interrupt | ||
| Used in response to a data interrupt (DIF) | |||
| W | Execute Acknowledge Action succeeded by reception of next byte | ||
| R | Execute a byte read operation followed by Acknowledge Action | ||