27.5.14 Slave Address Mask
| Name: | SADDRMASK |
| Offset: | 0x0E |
| Reset: | 0x00 |
| Property: | - |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| ADDRMASK[6:0] | ADDREN | ||||||||
| Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
Bits 7:1 – ADDRMASK[6:0] Address Mask
The ADDRMASK bit field acts as a second address match or an address mask register depending on the ADDREN bit.
If the ADDREN bit is written to ‘0’, the ADDRMASK
bit field can be loaded with a 7-bit Slave Address mask. Each of the bits in the
Slave Address Mask (TWIn.SADDRMASK) register can mask (disable) the
corresponding address bits in the TWI Slave Address (TWIn.SADDR) register. When
a bit from the mask is written to ‘1’, the address match logic
ignores the comparison between the incoming address bit and the corresponding
bit in the Slave Address (TWIn.SADDR) register. In other words, masked bits will
always match, making it possible to recognize ranges of addresses.
If the ADDREN bit is written to ‘1’, the Slave
Address Mask (TWIn.SADDRMASK) register can be loaded with a second slave address
in addition to the Slave Address (TWIn.SADDR) register. In this mode, the slave
will have two unique addresses, one in the Slave Address (TWIn.SADDR) register
and the other one in the Slave Address Mask (TWIn.SADDRMASK) register.
Bit 0 – ADDREN Address Mask Enable
If this bit is written to ‘0’, the TWIn.SADDRMASK
register acts as a mask to the TWIn.SADDR register.
If this bit is written to ‘1’, the slave address
match logic responds to the two unique addresses in slave TWIn.SADDR and
TWIn.SADDRMASK.