13.27.5.7 Debug Operation
When the CPU is halted in debug mode the ADC will halt normal operation. The ADC can be forced to continue operation during debugging. Refer to DBGCTRL13.27.8.18 Debug Control for details.
When the CPU is halted in debug mode the ADC will halt normal operation. The ADC can be forced to continue operation during debugging. Refer to DBGCTRL13.27.8.18 Debug Control for details.
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