7.1 Multiplexed Signals

Each pin is controlled by the PORT as a general purpose I/O by default and, alternatively, can be assigned to one of the peripheral functions A, B, C, D, E, F, G, H or I. To enable a peripheral function on a pin, the Peripheral Multiplexer Enable bit in the Pin Configuration register corresponding to that pin (PINCFGn.PMUXEN, n = 0..31) in the PORT must be written to '1'. The selection of peripheral function A to H is done by writing to the Peripheral Multiplexing Odd and Even bits in the Peripheral Multiplexing register (PMUXn.PMUXE/O) in the PORT.

This table describes the peripheral signals multiplexed to the PORT I/O pins.

Table 7-1. Port Function Multiplexing
PIN		I/O Pin	Supply	A		B⁽¹⁾⁽²⁾					C	D	E	F	G	H	I
SAMR30E	SAMR30G	I/O Pin	Supply	EIC	RSTC	AC	ADC	REF	PTC X-lines	PTC Y-lines	SERCOM⁽¹⁾⁽²⁾	SERCOM-ALT	TC/ TCC	FECTRL/TCC	COM	AC/ GCLK/ SUPC	CCL
—	1	PA00	VSWOUT	EXTINT[0]	EXTWAKE[0]	—	—	—	—	—	—	SERCOM1/PAD[0]	TCC2/WO[0]	—	—	—	—
—	2	PA01	VSWOUT	EXTINT[1]	EXTWAKE[1]	—	—	—	—	—	—	SERCOM1/PAD[1]	TCC2/WO[1]	—	—	—	—
—	9	PA04	VDDANA	EXTINT[4]	EXTWAKE[4]	AIN[0]	AIN[4]	ADC/VREFB	—	—	—	SERCOM0/PAD[0]	TCC0/WO[0]	—	—	—	CCL0/IN[0]
—	10	PA05	VDDANA	EXTINT[5]	EXTWAKE[5]	AIN[1]	AIN[5]	—	—	—	—	SERCOM0/PAD[1]	TCC0/WO[1]	—	—	—	CCL0/IN[1]
7	11	PA06	VDDANA	EXTINT[6]	EXTWAKE[6]	AIN[2]	AIN[6]	—	—	Y[4]	—	SERCOM0/PAD[2]	TCC1/WO[0]	—	—	—	CCL0/IN[2]
8	12	PA07	VDDANA	EXTINT[7]	EXTWAKE[7]	AIN[3]	AIN[7]	—	—	—	—	SERCOM0/PAD[3]	TCC1/WO[1]	—	—	—	CCL0/OUT
9	15	PA08	VDDIO	NMI	—	—	AIN[16]	—	X[0]	Y[6]	SERCOM0/PAD[0]	SERCOM2/PAD[0]	TCC0/WO[0]	FECTRL[0]	—	—	CCL1/IN[0]
10	16	PA09	VDDIO	EXTINT[9]	—	—	AIN[17]	—	X[1]	Y[7]	SERCOM0/PAD[1]	SERCOM2/PAD[1]	TCC0/WO[1]	FECTRL[1]	—	—	CCL1/IN[1]
—	21	PA12	VDDIO	EXTINT[12]	—	—	—	—	—	—	SERCOM2/PAD[0]	SERCOM4/PAD[0]	TCC2/WO[0]	FECTRL[2]	—	AC/CMP[0]	—
—	22	PA13	VDDIO	EXTINT[13]	—	—	—	—	—	—	SERCOM2/PAD[1]	SERCOM4/PAD[1]	TCC2/WO[1]	FECTRL[3]	—	AC/CMP[1]	—
15	23	PA14	VDDIO	EXTINT[14]	—	—	—	—	—	—	SERCOM2/PAD[2]	SERCOM4/PAD[2]	TC4/WO[0]	FECTRL[4]	—	GCLK/IO[0]	—
16	24	PA15	VDDIO	EXTINT[15]	—	—	—	—	—	—	SERCOM2/PAD[3]	SERCOM4/PAD[3]	TC4/WO[1]	FECTRL[5]	—	GCLK/IO[1]	—
17	25	PA16	VDDIO	EXTINT[0]	—	—	—	—	X[4]	—	SERCOM1/PAD[0]	SERCOM3/PAD[0]	TCC2/WO[0]	TCC0/WO[6]	—	GCLK/IO[2]	CCL0/IN[0]
18	26	PA17	VDDIO	EXTINT[1]	—	—	—	—	X[5]	—	SERCOM1/PAD[1]	SERCOM3/PAD[1]	TCC2/WO[1]	TCC0/WO[7]	—	GCLK/IO[3]	CCL0/IN[1]
19	27	PA18	VDDIO	EXTINT[2]	—	—	—	—	X[6]	—	SERCOM1/PAD[2]	SERCOM3/PAD[2]	TC4/WO[0]	TCC0/WO[2]	—	AC/CMP[0]	CCL0/IN[2]
20	28	PA19	VDDIO	EXTINT[3]	—	—	—	—	X[7]	—	SERCOM1/PAD[3]	SERCOM3/PAD[3]	TC4/WO[1]	TCC0/WO[3]	—	AC/CMP[1]	CCL0/OUT
—	31	PA22	VDDIO	EXTINT[6]	—	—	—	—	X[10]	—	SERCOM3/PAD[0]	SERCOM5/PAD[0]	TC0/WO[0]	TCC0/WO[4]	—	GCLK/IO[6]	CCL2/IN[0]
—	32	PA23	VDDIO	EXTINT[7]	—	—	—	—	X[11]	—	SERCOM3/PAD[1]	SERCOM5/PAD[1]	TC0/WO[1]	TCC0/WO[5]	USB/SOF_1KHZ	GCLK/IO[7]	CCL2/IN[1]
22	33	PA24	VDDIO	EXTINT[12]	—	—	—	—	—	—	SERCOM3/PAD[2]	SERCOM5/PAD[2]	TC1/WO[0]	TCC1/WO[2]	USB/DM	—	CCL2/IN[2]
23	34	PA25	VDDIO	EXTINT[13]	—	—	—	—	—	—	SERCOM3/PAD[3]	SERCOM5/PAD[3]	TC1/WO[1]	TCC1/WO[3]	USB/DP	—	CCL2/OUT
—	37	PB22	VDDIN	EXTINT[6]	—	—	—	—	—	—	—	SERCOM5/PAD[2]	—	—	—	GCLK/IO[0]	CCL0/IN[0]
—	38	PB23	VDDIN	EXTINT[7]	—	—	—	—	—	—	—	SERCOM5/PAD[3]	—	—	—	GCLK/IO[1]	CCL0/OUT
25	39	PA27	VDDIN	EXTINT[15]	—	—	—	—	—	—	—	—	—	—		GCLK/IO[0]	—
27	41	PA28	VDDIN	EXTINT[8]	—	—	—	—	—	—	—	—	—	—	—	GCLK/IO[0]	—
31	45	PA30	VDDIN	EXTINT[10]	—	—	—	—	—	—	—	SERCOM1/PAD[2]	TCC1/WO[0]	—	CM0P/SWCLK	GCLK/IO[0]	CCL1/IN[0]
32	46	PA31	VDDIN	EXTINT[11]	—	—	—	—	—	—	—	SERCOM1/PAD[3]	TCC1/WO[1]	—	SWDIO⁽³⁾	—	CCL1/OUT
—	47	PB02	VSWOUT	EXTINT[2]	—	—	AIN[10]	—	—	—	—	SERCOM5/PAD[0]	—	—	—	SUPC/OUT[1]	CCL0/OUT
—	48	PB03	VSWOUT	EXTINT[3]	—	—	AIN[11]	—	—	—	—	SERCOM5/PAD[1]	—	—	—	SUPC/VBAT	—

All analog pin functions are on peripheral function B. Peripheral function B must be selected to disable the digital control of the pin.
Only some pins can be used in SERCOM I²C mode. See also SERCOM I²C Pins.
This function is only activated in the presence of a debugger.
When an analog peripheral is enabled, the analog output of the peripheral will interfere with the alternative functions of this pin. This is also true even when the peripheral is used for internal purposes.
Clusters of multiple GPIO pins are sharing the same supply pin.