13.12.6.7 Synchronization

Due to asynchronicity between the main clock domain and the peripheral clock domains, some registers need to be synchronized when written or read.

The following registers are synchronized when written:

• Enable bit in Control A register (CTRLA.ENABLE)
• Window Enable bit in Control A register (CTRLA.WEN)
• Always-On bit in control Control A (CTRLA.ALWAYSON)
• Watchdog Clear register (CLEAR)

Required write synchronization is denoted by the "Write-Synchronized" property in the register description.

Required read synchronization is denoted by the "Read-Synchronized" property in the register description.