13.19.6.2.1 Initialization

The SERCOM must be configured to the desired mode by writing the Operating Mode bits in the Control A register (CTRLA.MODE). Refer to table SERCOM Modes for details.

Table 13-53. SERCOM Modes
CTRLA.MODE	Description
0x0	USART with external clock
0x1	USART with internal clock
0x2	SPI in slave operation
0x3	SPI in master operation
0x4	I²C slave operation
0x5	I²C master operation
0x6-0x7	Reserved

For further initialization information, see the respective SERCOM mode chapters:

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