8.2 Physical Memory Map
The high-speed bus is implemented as a bus matrix. All high-speed bus addresses are fixed, and they are never remapped in any way, even during boot. The 32-bit physical address space is mapped as shown in the following table:
Memory | StartAddress | PIC32CM6408 | PIC32CM3204 | |
---|---|---|---|---|
Embedded Flash | size | 0x00000000 | 64KB | 32KB |
page number | 1024 | 512 | ||
page size | 64 bytes | |||
Embedded Data Flash section | size | 0x00400000 | 2KB | 1KB |
page number | 32 | 16 | ||
page size | 64 bytes | |||
Embedded high-speed SRAM | 0x20000000 | 8KB | 4KB | |
AHB-APB Bridge A | 0x40000000 | 64KB | ||
AHB-APB Bridge B | 0x41000000 | 64KB | ||
AHB-APB Bridge C | 0x42000000 | 64KB | ||
AHB DIVAS | 0x48000000 | 64KB | ||
IOBUS | 0x60000000 | 64KB |