8.2 Physical Memory Map

The high-speed bus is implemented as a bus matrix. All high-speed bus addresses are fixed, and they are never remapped in any way, even during boot. The 32-bit physical address space is mapped as shown in the following table:

Table 8-1. Memory Map
MemoryStartAddressPIC32CM6408PIC32CM3204
Embedded Flashsize0x0000000064KB32KB
page number1024512
page size64 bytes
Embedded Data Flash sectionsize0x004000002KB1KB
page number3216
page size64 bytes
Embedded high-speed SRAM0x200000008KB4KB
AHB-APB Bridge A0x4000000064KB
AHB-APB Bridge B0x4100000064KB
AHB-APB Bridge C0x4200000064KB
AHB DIVAS0x4800000064KB
IOBUS0x6000000064KB