48.3.4 I/O Ports

Table 48-4. 
Standard Operating Conditions (unless otherwise stated)
Param. No.Sym.Device CharacteristicsMin.Typ.†Max.UnitsConditions
Input Low-Voltage
VILI/O PORT:
D300
  • with LVBUF (TTL compatible)
——0.9V
D302
  • with Schmitt Trigger buffer
——0.2 VDDV2.0V ≤ VDD ≤ 5.5V
——0.2 VDDIOxV2.0V ≤ VDDIOx ≤ 5.5V
D303
  • with I2C levels
——0.3 VDDV2.0V ≤ VDD ≤ 5.5V
D304
  • with SMBus 2.0
——0.8V2.7V ≤ VDD ≤ 5.5V
D305
  • with SMBus 3.0
——0.8V
D306MCLR——0.2 VDDV
High/Low-Voltage
VIHI/O PORT:
D320
  • with LVBUF (TTL compatible)
1.3——V
D322
  • with Schmitt Trigger buffer
0.8 VDD——V2.0V ≤ VDD ≤ 5.5V
0.8 VDDIOx——V2.0V ≤ VDDIOx ≤ 5.5V
D323
  • with I2C levels
0.7 VDD——V
D324
  • with SMBus 2.0
2.1——V2.7V ≤ VDD ≤ 5.5V; 2.7V ≤ VDDIOx ≤ 5.5V
D325
  • with SMBus 3.0
1.35——V
D326MCLR0.7 VDD——V
Input Leakage Current(1)
D340IILAll I/O Pins (VDD and MVIO domains)—±5±125nA

VSS ≤ VPIN ≤ VDD (VDD domain);

VSS ≤ VPIN ≤ +6.5V (MVIO domain);

Pin at high-impedance, 85°C

D341—±5±1000nA

VSS ≤ VPIN ≤ VDD (VDD domain);

VSS ≤ VPIN ≤ +6.5V (MVIO domain);

Pin at high-impedance, 125°C

D342MCLR(2)—±50±200nAVSS ≤ VPIN ≤ VDD,

Pin at high-impedance, 85°C

Weak Pull-up Current
D350IPUR80140200μAVDD = 3.0V,

VPIN = VSS

Output Low-Voltage
D360VOL
  • with GPIO driver (all pins on VDD and MVIO domains)
——0.6VIOL = 10.0 mA,

VPIN = 3.0V

Output High-Voltage
D370VOH
  • with GPIO driver (all pins on VDD and MVIO domains)
VDD - 0.7——VVPIN = 3.0V;

IOH = 6 mA

VDDIOx - 0.7——V
Load Capacitance
D380CIOAll I/O Pins (VDD and MVIO domains)—550pF
Input Capacitance
D390CIAll I/O Pins (VDD and MVIO domains)——5pF

† Data in “Typ” column is at 3.0V, 25°C unless otherwise stated. These parameters are for design guidance only and are not tested.

Note:
  1. Negative current is defined as current sourced by the pin.
  2. The leakage current on the MCLR pin is strongly dependent on the applied voltage level. The specified levels represent normal operating conditions. Higher leakage current may be measured at different input voltages.