48.3.1 Supply Voltage

Table 48-1. 
Standard Operating Conditions (unless otherwise stated)
Param. No. Sym. Characteristic Min. Typ.† Max. Units Conditions
Supply Voltage
D002 VDD 1.8

—

 5.5

V
D002A VDDIO2 1.62

—

 5.5

V

 Standard Operating Range
RAM Data Retention(1)
D003 VDR 1.7

—

—

V

 Device in Sleep mode; on VDD domain
Power-on Reset Release Voltage(2)
D004 VPOR

—

 1.6

—

V

 BOR and LPBOR disabled(3); on VDD domain
D004A VPORVDDIO2

—

—

—

V

 VDDIO2 domain
Power-on Reset Rearm Voltage(2)
D005 VPORR

—

 1

—

V

 BOR and LPBOR disabled(3); on VDD domain
D005A VPORRVDDIO2

—

—

—

V

 VDDIO2 domain
VDD Rise Rate to ensure internal Power-on Reset signal(2)
D006 SVDD 0.05

—

—

 V/ms BOR and LPBOR disabled(3); on VDD domain
— — 1.2 V/μs 1.8V ≤ VDD ≤ 5.5V
D006A SVDDIO2

0.05

—

—

 V/ms VDDIO2 domain

† Data in “Typ.” column is at 3.0V, 25°C unless otherwise stated. These parameters are for design guidance only and are not tested.

Note:
  1. This is the limit to which VDD can be lowered in Sleep mode without losing RAM data.
  2. See the following figure, POR and POR REARM with Slow Rising VDD.
  3. See Reset, WDT, Oscillator Start-up Timer, Brown-Out Reset and Low-Power Brown-Out Reset Specifications for BOR and LPBOR trip point information.
Figure 48-2. POR and POR Rearm with Slow Rising VDD
Note:
  1. When NPOR is low, the device is held in Reset.
  2. TPOR 1 μs typical.
  3. TVLOW 2.7 μs typical.