48.4.1 External Clock/Oscillator Timing Requirements

Note: See the table below.

Table 48-7. 

Standard Operating Conditions (unless otherwise stated)
Param No.	Sym.	Characteristic	Min.	Typ. †	Max.	Units	Conditions
ECL Oscillator
OS1	FECL	Clock Frequency	—	—	1	MHz
OS2*	TECL_DC	Clock Duty Cycle	40	—	60	%
ECM Oscillator
OS3	FECM	Clock Frequency	—	—	16	MHz
OS4*	TECM_DC	Clock Duty Cycle	40	—	60	%
ECH Oscillator
OS5	FECH	Clock Frequency	—	—	64	MHz	VDD > 2.7V
			—	—	32	MHz	VDD < 2.7V
OS6*	TECH_DC	Clock Duty Cycle	40	—	60	%
LP Oscillator
OS7	FLP	Clock Frequency	—	—	32	kHz	Note 4
XT Oscillator
OS8	FXT	Clock Frequency	—	—	4	MHz	Note 4
HS Oscillator
OS9	FHS	Clock Frequency	4	—	8	MHz	FEXTOSC = 'b0010(4)
OS9A			8	—	16	MHz	FEXTOSC = 'b0011(4)
OS9B			16	—	24	MHz	FEXTOSC = 'b0100(4)
OS9C			24	—	32	MHz	FEXTOSC = 'b0101(4)
OS10*	COSC1/OSC2	Parasitic Pin Capacitance	—	5	—	pF
OS11*	CL	Crystal Load Capacitance	—	12	—	pF
OS12*	RES	Equivalent Series Resistance	—	—	200	Ω	FEXTOSC = 'b0010, 4 MHz crystal(4)
OS12A*			—	—	100	Ω	FEXTOSC = 'b0010, 8 MHz crystal(4)
OS12B*			—	—	60	Ω	FEXTOSC = 'b0011, 16 MHz crystal(4)
OS12C*			—	—	40	Ω	FEXTOSC = 'b0100, 24 MHz crystal(4)
OS12D*			—	—	40	Ω	FEXTOSC = 'b0101, 32 MHz crystal(4)
Secondary Oscillator
OS13*	FSEC	Clock Frequency	32.4	32.768	33.1	kHz
OS14*	COSC1/OSC2	Parasitic Pin Capacitance	—	5	—	pF
OS15*	CL	Crystal Load Capacitance	—	—	8	pF	SOSCPWR =0
OS15A*			—	—	18	pF	SOSCPWR = 1
OS16*	RES	Equivalent Series Resistance	—	—	50	Ω	SOSCPWR = 0
OS16A*			—	—	100	Ω	SOSCPWR = 1
System Oscillator
OS20	FOSC	System Clock Frequency	—	—	64	MHz	Notes 2, 3
OS21	FCY	Instruction Frequency	—	FOSC/4	—	MHz
OS22	TCY	Instruction Period	62.5	1/FCY	—	ns	Note 1
Note: Instruction cycle period (TCY) equals four times the input oscillator time base period. All specified values are based on characterization data for that particular oscillator type under standard operating conditions with the device executing code. Exceeding these specified limits may result in an unstable oscillator operation and/or higher than expected current consumption. All devices are tested to operate at “min” values with an external clock applied to OSC1 pin. When an external clock input is used, the “max” cycle time limit is “DC” (no clock) for all devices. The system clock frequency (FOSC) is selected by the “main clock switch controls” as described in the “Power-Saving Mode Operation” section. The system clock frequency (FOSC) must meet the voltage requirements defined in the “Standard Operating Conditions” section. The HS Oscillator modes require an appropriate crystal or resonator to be connected to the device. For clocking the device with the external square wave, one of the EC mode selections must be used.