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ATmega4808/4809 Data Sheet ATmega4808/4809

ATmega4808 ATmega4809

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27 CCL - Configurable Custom Logic
27.3 Functional Description
27.3.1 Operation

ATmega4808/4809

Introduction
megaAVR® 0-series Overview
Features
1 Silicon Errata and Data Sheet Clarification Document
2 Block Diagram
3 Pinout
4 I/O Multiplexing and Considerations
5 Conventions
6 AVR® CPU
7 Memories
8 Peripherals and Architecture
9 NVMCTRL - Nonvolatile Memory Controller
10 CLKCTRL - Clock Controller
11 SLPCTRL - Sleep Controller
12 RSTCTRL - Reset Controller
13 CPUINT - CPU Interrupt Controller
14 EVSYS - Event System
15 PORTMUX - Port Multiplexer
16 PORT - I/O Pin Configuration
17 BOD - Brown-out Detector
18 VREF - Voltage Reference
19 WDT - Watchdog Timer
20 TCA - 16-bit Timer/Counter Type A
21 TCB - 16-Bit Timer/Counter Type B
22 RTC - Real-Time Counter
23 USART - Universal Synchronous and Asynchronous Receiver and Transmitter
24 SPI - Serial Peripheral Interface
25 TWI - Two-Wire Interface
26 CRCSCAN - Cyclic Redundancy Check Memory Scan
27 CCL - Configurable Custom Logic
28 AC - Analog Comparator
29 ADC - Analog-to-Digital Converter
30 UPDI - Unified Program and Debug Interface
31 Instruction Set Summary
32 Electrical Characteristics
33 Typical Characteristics
34 Ordering Information
35 Package Drawings
36 Data Sheet Revision History
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27.3.1 Operation

The online versions of the documents are provided as a courtesy. Verify all content and data in the device’s PDF documentation found on the device product page.

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