Software Configuration

• Assign EBI_CS1 to the MPDDRC controller by setting the EBI_CS1A bit in the SFR_CCFG_EBICSA register.
• Initialize the MPDDR Controller depending on the DDR2 device and system bus frequency.

The DDR2 initialization sequence is described in the subsection “DDR2 Device Initialization” of DDR-SDRAM Controller (MPDDRC).