4.13.5.2.8 Receiver Timeout

The Receiver Timeout provides support in handling variable-length frames. This feature detects an idle condition on the DRXD line. When a timeout is detected, the bit TIMEOUT in DBGU_SR rises and can generate an interrupt, thus indicating to the driver an end of frame.

The timeout delay period (during which the receiver waits for a new character) is programmed in the TO field of the Receiver Timeout register (DBGU_RTOR). If the TO field is written to 0, the Receiver Timeout is disabled and no timeout is detected. The TIMEOUT bit remains at 0. Otherwise, the receiver loads an 8-bit counter with the value programmed in TO. This counter is decremented at each bit period and reloaded each time a new character is received. If the counter reaches 0, the TIMEOUT bit rises. Then, the user can either:

  • stop the counter clock until a new character is received. This is performed by writing a one to the STTTO (Start timeout) bit in DBGU_CR. In this case, the idle state on DRXD before a new character is received does not provide a timeout. This prevents having to handle an interrupt before a character is received and allows waiting for the next idle state on DRXD after a frame is received, or
  • obtain an interrupt while no character is received. This is performed by writing a one to the RETTO (Reload and start timeout) bit in DBGU_CR. If RETTO is performed, the counter starts counting down immediately from the TO value. This enables generation of a periodic interrupt so that a user timeout can be handled, for example when no key is pressed on a keyboard.

If STTTO is performed, the counter clock is stopped until a first character is received. The idle state on DRXD before the start of the frame does not provide a timeout. This prevents having to obtain a periodic interrupt and enables a wait of the end of frame when the idle state on DRXD is detected.

If RETTO is performed, the counter starts counting down immediately from the TO value. This enables generation of a periodic interrupt so that a user timeout can be handled, for example when no key is pressed on a keyboard.

The following figure shows the block diagram of the Receiver Timeout feature.

Figure 4-53. Receiver Timeout Block Diagram

The following table gives the maximum timeout period for some standard baud rates.

Table 4-5. Maximum Timeout Period
Baud Rate (bit/s)Bit Time (μs)Timeout (μs)
6001,667425,085
1,200833212,415
2,400417106,335
4,80020853,040
9,60010426,520
14,4006917,595
19,2005213,260
28,800358,925
38,400266,630
56,000184,590
57,600174,335
200,00051,275