3.6.5.5 Optimized Access Functionality

The DDR-SDRAM protocol imposes a check of timings prior to performing a read or a write access, thus decreasing system performance. An access to DDR-SDRAM is performed if banks and rows are open (or active). To activate a row in a particular bank, the last open row must be deactivated and a new row must be open. Two DDR-SDRAM commands must be performed to open a bank: Precharge command and Activate command with respect to TRP timing. Before performing a read or write command, TRCD timing must be checked.

This operation generates a significant bandwidth loss.

The controller is designed to mask these timings and thus improve the system bandwidth.

The MPDDRC is a controller whereby 7 hosts can simultaneously reach the controller. This feature improves the bandwidth of the system because it can detect 7 requests on the system bus client inputs and thus anticipate the commands that follow, Precharge command and Activate command in bank X during the current access in bank Y. This masks tRP and tRCD timings (see the following figure). In the best case, all accesses are done as if the banks and rows were already open. The best condition is met when the 7 hosts work in different banks. In the case of 7 simultaneous read accesses, when the four or eight banks and associated rows are open, the controller reads with a continuous flow and masks the CAS latency for each access. To allow a continuous flow, the read command must be set at 3, 4, 5 or 6 cycles (CAS latency) before the end of the current access. The arbitration scheme must be changed since the round-robin arbitration cannot be respected. If the controller anticipates a read access, and thus a host with a high priority arises before the end of the current access, then this host will not be serviced.

Figure 3-60. Anticipate Precharge/Activate Command in Bank 2 during Read Access in Bank 1

MPDDRC embeds three arbitration mechanisms based on round-robin arbitration which allows to share the external device between different hosts when two or more hosts try to access the DDR-SDRAM device at the same time.

The three arbitration types are round-robin arbitration and two weighted round-robin arbitrations. For weighted round-robin arbitrations, the priority can be given either depending on the number of requests or words per port, or depending on the required bandwidth per port. The type of arbitration can be chosen by setting the ARB field in the Configuration Arbiter register (MPDDRC_CONF_ARBITER) (see MPDDRC Configuration Arbiter Register).