5.6.3 I/O Lines Description

Signal Name	Type	Function
MIPI_DP0	Input	Positive D-PHY differential data line receiver, Lane 0
MIPI_DN0	Input	Negative D-PHY differential data line receiver, Lane 0
MIPI_DP1	Input	Positive D-PHY differential data line receiver, Lane 1
MIPI_DN1	Input	Negative D-PHY differential data line receiver, Lane 1
MIPI_DP2	Input	Positive D-PHY differential data line receiver, Lane 2
MIPI_DN2	Input	Negative D-PHY differential data line receiver, Lane 2
MIPI_DP3	Input	Positive D-PHY differential data line receiver, Lane 3
MIPI_DN3	Input	Negative D-PHY differential data line receiver, Lane 3
MIPI_CLKP	Input	Positive D-PHY differential clock line receiver
MIPI_CLKN	Input	Negative D-PHY differential clock line receiver
MIPI_REXT	Input	D-PHY external resistor connection

MIPI_DP0

Input

Positive D-PHY differential data line receiver, Lane 0

MIPI_DN0

Input

Negative D-PHY differential data line receiver, Lane 0

MIPI_DP1

Input

Positive D-PHY differential data line receiver, Lane 1

MIPI_DN1

Input

Negative D-PHY differential data line receiver, Lane 1

MIPI_DP2

Input

Positive D-PHY differential data line receiver, Lane 2

MIPI_DN2

Input

Negative D-PHY differential data line receiver, Lane 2

MIPI_DP3

Input

Positive D-PHY differential data line receiver, Lane 3

MIPI_DN3

Input

Negative D-PHY differential data line receiver, Lane 3

MIPI_CLKP

Input

Positive D-PHY differential clock line receiver

MIPI_CLKN

Input

Negative D-PHY differential clock line receiver

MIPI_REXT

Input

D-PHY external resistor connection