2.3.1.2 MATRIX Clients
The MATRIX manages the 12 clients listed in the table below. Each client has its own arbiter, providing a dedicated arbitration per client.
| Client No. | Description |
|---|---|
| 0 | MPDDRC port 4 with QoS support |
| 1 | EBI/MPDDRC port 0 |
| 2 | MPDDRC port 1 |
| 3 | MPDDRC port 2 |
| 4 | MPDDRC port 3 |
| 5 | SRAM0 |
| 6 | OTPC client interface (ROM and OTP memory) |
| 7 | CSI2DC |
| 8 | APB 0 |
| 9 | APB 1 |
| 10 | QSPI |
| 11 | UDPHS dual port RAM |
| UHPHS OHCI configuration registers | |
| UHPHS EHCI configuration registers | |
| SDMMC0 configuration registers | |
| SDMMC1 configuration registers | |
| SRAM1 port 1 |
Note:
- APB0 is running @ MCK (up to 266 MHz) and includes TC0-1, FLEXCOM1,2,3,6,7,8,9,10, PWM, ADC, CAN0-1, PUF
- APB1 is running @ MCK (up to 266 MHz) and includes high-performance peripherals: SSC, CLASSD, I2SMCC, TRNG, TDES, SHA, AES PIT64B0-1, FLEXCOM4,5,11,12