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Arm® Arm926EJ-S™ Processor-Based MPU, 800 MHz, MIPI DSI® or CSI-2, LVDS, RGB, 2D Graphics, Gigabit Ethernet with TSN, CAN-FD, Octal/Quad SPI, Crypto, PUF
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8
Connectivity Subsystem
8.7
Timer Counter (TC)
8.7.6
Functional Description
Introduction
Reference Document
1
Overview
2
CPU and Interconnect
3
Memories
4
System Controller
5
Image Subsystem
6
Audio Subsystem
7
Security and Cryptography Subsystem
8
Connectivity Subsystem
8.1
Overview
8.2
Ethernet MAC (GMAC)
8.3
Flexible Serial Communication Controller (FLEXCOM)
8.4
Quad Serial Peripheral Interface (QSPI)
8.5
Secure Digital MultiMedia Card Controller (SDMMC)
8.6
Controller Area Network (MCAN)
8.7
Timer Counter (TC)
8.7.1
Description
8.7.2
Embedded Characteristics
8.7.3
Block Diagram
8.7.4
Pin List
8.7.5
Product Dependencies
8.7.6
Functional Description
8.7.6.1
Description
8.7.6.2
32
-bit Counter
8.7.6.3
Clock Selection
8.7.6.4
Clock Control
8.7.6.5
Operating Modes
8.7.6.6
Trigger Events
8.7.6.7
Trigger Conditions
8.7.6.8
Capture Mode
8.7.6.9
Capture Registers A and B
8.7.6.10
Transferring Timer Values with
DMAC
in Capture Mode
8.7.6.11
Waveform Mode
8.7.6.12
Waveform Selection
8.7.6.13
External Event/Trigger Conditions
8.7.6.14
Synchronization with PWM
8.7.6.15
Output Controller
8.7.6.16
Quadrature Decoder
8.7.6.17
2-bit Gray Up/Down Counter for Stepper Motor
8.7.6.18
Register Write Protection
8.7.6.19
Security and Safety Analysis and Reports
8.7.7
Register Summary
8.8
Pulse Width Modulation Controller (PWM)
9
USB Subsystem
10
Electrical and Mechanical Characteristics
11
Revision History
Microchip Information
8.7.6 Functional Description
