64.5.4.1.8 PIOBUx Alarm Filtering in Static Mode

It is possible to filter the PIOBUx alarm detection by programming SECUMOD_PIOBUx.PIOBU_AFV. The steps are as follows:

  1. A 9-bit counter is incremented each time the value present on the corresponding input is not the expected one.
  2. An alarm is sent to the Protection Unit if the counter value reaches the value programmed in PIOBU_AFV.

The previous 9-bit counter is reset only if the value present on the input is correct and stable for a continuous programmable period defined by SECUMOD_PIOBUx.PIOBU_RFV (a second counter is used for that operation). See the figure below.

Figure 64-4. PIOBUx Alarm Filtering Principle

At reset state, the debouncers are not activated (PIOBU_AFV and PIOBU_RFV fields set to 0), which implies that no alarm can be generated.

Once both the PIOBU_AFV and the PIOBU_RFV fields have been programmed, the corresponding protection is activated and a CLR signal is generated automatically when an intrusion is detected. It is possible to generate an interrupt (or a wakeup signal) instead of clearing the secure memories content. To do so, the user must disable the protection in the Normal Mode Protection register (SECUMOD_NMPR) and configure the Normal Interrupt Enable Protection register (SECUMOD_NIEPR).

Note: If the Normal Mode Protection/Backup Mode Protection registers are not hidden, their configuration has priority on the debouncer activation in the PIOBUx configuration registers, which means that CLR signal generation is enabled/disabled in those two registers. Setting the PIOBU_AFV and PIOBU_RFV fields configure the debouncer sensitivity and does not generate any clear signal when an intrusion is detected.
Table 64-3. Debouncing Time vs. fICLK
Debouncing Time fICLK (kHz) Unit
Min = 38 Typ = 64 Max = 90
Min (PIOBU_AFV = 1) 6.74 4.00 2.84 ms
Max (PIOBU_AFV = 9) 3.45 2.05 1.46 s
Note: At reset state, the PIOBU_AFV and PIOBU_RFV fields are set to 0.