2.2 FIFO Corruption
In case of a mode switching, consider the buffer content from the Data FIFO (DFIFO) and
Support FIFO (SFIFO). As the handling from the buffers differ, ensure consistent content
between the RX mode and TX mode. Switch from RX mode to TX mode cautiously. There is no
automatic clearance prior to the start of the TX mode, which means that any remaining
information in SFIFO or DFIFO corrupts the transmission pattern. There are two options
to clear the buffer and get a known state:
- The first option is to read all data, as this will reduce the fill level by the number of bytes read. Continue with the next operation mode if you have read all data from the buffer.
- The second option is to trigger a
clearance by writing the DFCLR.DFL and SFCLR.SFL bits to ‘
1’.
During the start of the RX mode, the firmware takes care of a buffer reset; therefore, there is no need for additional action. In the case of using the Continuous Receive mode, the user must carefully handle the buffer content. In Continuous Receiver mode, the device does not stop the reception after the End Of Telegram (EOT). Multiple message reception can lead to an overflow of the buffer, and this overflow can trigger an error event if it is not disabled in the EEPROM configuration. In addition, unprocessed data can be overwritten. Handle the data carefully to achieve a stable application.