36.5.8 I2CxPIE

I2C Interrupt and Hold Enable Register

Note:

Enabled interrupt flags are OR’ed to produce the PIRx[I2CxIF] bit.
When ACKTIE is set (ACKTIE = 1) and ACKTIF becomes set (ACKTIF = 1), if an ACK is generated, CSTR is also set. If a NACK is generated, CSTR remains unchanged.
When WRIE is set (WRIE = 1) and WRIF becomes set (WRIF = 1), CSTR is also set.
When ADRIE is set (ADRIE = 1) and ADRIF becomes set (ADRIF = 1), CSTR is also set.

Name:	I2CxPIE
Address:	0x01EB


Bit	7	6	5	4	3	2	1	0
	CNTIE	ACKTIE		WRIE	ADRIE	PCIE	RSCIE	SCIE
Access	R/W	R/W		R/W	R/W	R/W	R/W	R/W
Reset	0	0		0	0	0	0	0

Bit 7 – CNTIE Byte Count Interrupt Enable⁽¹⁾

Value	Description
`1`	Enables Byte Count interrupts
`0`	Disables Byte Count interrupts

Bit 6 – ACKTIE Acknowledge Status Time Interrupt and Hold Enable^(1,2)

Value	Description
`1`	Enables Acknowledge Status Time Interrupt and Hold condition
`0`	Disables Acknowledge Status Time Interrupt and Hold condition

Bit 4 – WRIE Data Write Interrupt and Hold Enable^(1,3)

Value	Description
`1`	Enables Data Write Interrupt and Hold condition
`0`	Disables Data Write Interrupt and Hold condition

Bit 3 – ADRIE Address Interrupt and Hold Enable^(1,4)

Value	Description
`1`	Enables Address Interrupt and Hold condition
`0`	Disables Address Interrupt and Hold condition

Bit 2 – PCIE Stop Condition Interrupt Enable⁽¹⁾

Value	Description
`1`	Enables interrupt on the detection of a Stop condition
`0`	Disables interrupt on the detection of a Stop condition

Bit 1 – RSCIE Restart Condition Interrupt Enable⁽¹⁾

Value	Description
`1`	Enables interrupt on the detection of a Restart condition
`0`	Disables interrupt on the detection of a Restart condition

Bit 0 – SCIE Stop Condition Interrupt Enable⁽¹⁾

Value	Description
`1`	Enables interrupt on the detection of a Start condition
`0`	Disables interrupt on the detection of a Start condition

Enabled interrupt flags are OR’ed to produce the PIRx[I2CxIF] bit. When ACKTIE is set (ACKTIE = 1) and ACKTIF Acknowledge Status Time Interrupt Flag (used only when MODE I2C Mode Select = 0xx or MODE = 11x)(1,2) becomes set (ACKTIF = 1), if an ACK is generated, CSTR Client Clock Stretching(3) is also set. If a NACK is generated, CSTR remains unchanged. When WRIE is set (WRIE = 1) and WRIF Data Write Interrupt Flag (used only when MODE I2C Mode Select = 0xx or MODE = 11x)(1) becomes set (WRIF = 1), CSTR Client Clock Stretching(3) is also set. When ADRIE is set (ADRIE = 1) and ADRIF Address Interrupt Flag (used only when MODE I2C Mode Select = 0xx or MODE = 11x)(1) becomes set (ADRIF = 1), CSTR Client Clock Stretching(3) is also set.