18.4.1 PMD0

PMD Control Register 0
Note:
  1. Clearing the SYSCMD bit disables the system clock (FOSC) to peripherals, however peripherals clocked by FOSC/4 are not affected.
Name: PMD0
Address: 0x300

Bit 76543210 
 SYSCMDSCANMDCRCMD DMA4MDDMA3MDDMA2MDDMA1MD 
Access R/WR/WR/WR/WR/WR/WR/W 
Reset 0000000 

Bit 7 – SYSCMD  Disable Peripheral System Clock Network(1)

ValueDescription
1 System clock network disabled (FOSC)
0 System clock network enabled

Bit 6 – SCANMD Disable NVM Memory Scanner

ValueDescription
1 NVM memory scanner module disabled
0 NVM memory scanner module enabled

Bit 5 – CRCMD Disable CRC Module

ValueDescription
1 CRC module disabled
0 CRC module enabled

Bits 0, 1, 2, 3 – DMAnMD Disable DMAn

ValueDescription
1 DMAn module disabled
0 DMAn module enabled
Clearing the SYSCMD bit disables the system clock (FOSC) to peripherals, however peripherals clocked by FOSC/4 are not affected.